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 U842B
Wiper Control for Intermittent and Wipe/ Wash Mode
Description
The U842B circuit is designed as an interval and wipe/ wash timer for automotive wiper control. The interval pause can be set in a range from 3 s to 11 s by an external 1-kW potentiometer. Wipe/wash mode has priority over the interval mode. The U842B controls the wiper motor with/without park switch signal. The integrated relay driver is protected against short circuits and is switched to conductive condition in the case of a load-dump. With only a few external components, protection against RF interference and transients (ISO/TR 7637-1/3) can be achieved.
Features
D Interval input: low side D Wipe/ wash input: low side D Park input: high side (park position) D Output driver protected against short circuit D All time periods determined by RC oscillator D Fixed relay activation time of 500 ms D Adjustable interval pause from 3 s to 11 s D Fixed pre-wash delay of 400 ms D Dry wiping
- With park switch signal: 3 cycles - Without park switch signal: 2.8 s
D Inputs INT, WASH and PARK digitally debounced D All inputs with integrated RF protection D Load-dump protection and interference protection according to ISO 7637-1/3 (DIN 40839)
Application
Digital/ wipe-wash control for rear or front wiper
Ordring Information
Extended Type Number U842B U842B-FP Package DIP8 SO8 Remarks
Pin Description
Pin 1 2 3 4 5 6 7 8 Symbol INT WASH PARK PAUS OSC VS GND OUT Function Interval input Wipe/ wash input Park switch input Pause time adjust Oscillator input Supply voltage Ground Relay output INT 1 8 OUT
WASH PARK PAUS
2
7
GND
U842B
3 6 Vs OSC
13300
4
5
Figure 1. Pinning
TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97
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U842B
Block Diagram
VS 6 GND 7
21 V 1/2 VS
Stabilization POR Load-dump - detection 28 V
8
OUT
INT
1
+ - 250 mV + -
25 pF 21 V WASH 2 + -
Logic
0.5
25 pF 21 V PARK 3 + - VS + - 25 pF 4 PAUS Figure 2. Block diagram 21 V 5 OSC
13287
Oscillator
25 pF 21 V
OUT Upper switching point 21 V
Basic Circuit
Power Supply
For reasons of interference protection and surge immunity, a RC circuitry has to be provided to limit the current, and to supply the integrated circuit in the case of supply voltage drops. Suggested values: R1 = 180 W, C1 = 47 mF, (see figure 2) The supply (Pin 6) is clamped with a 21-V Zener diode. The operation voltage ranges between VBatt = 9 V to 16 V. The capacitor, C1, can be dimensioned smaller (typically: 10 mF) if a diode is used in the supply against polarity reversal. In this case of negative interference pulses, there, is only a small discharge current of the circuit.
Oscillator
All timing sequences in the circuit are derived from an RC oscillator which is charged by an external resistor, R9, and discharged by an integrated 2-k W resistor. The basic frequency, f0, is determined by the capacitor, C2, and an integrated voltage divider. The basic frequency is adjusted to 320 Hz ( 3.125 ms ) by C2 = 100 nF and R9 = 220 kW. The tolerances and the temperature coefficients of the external components determine the precision of the oscillator frequency. A 1% metallic-film resistor and a 5% capacitor are recommended.. The debouncing times of the inputs, the turn-on time of the relay (t5), the pre-wash delay (t1), the dry wiping time (t2) and the debouncing time (t7, short circuit detection) depend on the oscillator frequency (f0) as follows:
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TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97
U842B
VBatt R1 180 R9 220 k C1 47 F 8 7 6 5 C2 100 nF
U842B
1 R4 10 k Switch INT Button WASH PARK Figure 3. Basic cicuitry R5 47 k 2 3 R6 10 k R11 360 VR1 1 k 4
R7 1.5 k
13288
Variable Debouncing Times
Debouncing is basically done by counting oscillator clocks starting with the occurance of any input signal. Caused by the asynchronism of input signal and IC-clock, the debouncing time may vary in a certain range. Figure 4 shows the short circuit debouncing as an example: During the relay activation, a comparator monitors the output current at each positive edge of the clock to load a 3-stage shift register in the case of a detected short circuit condition i.e., I > 500 mA. With the third edge, the output stage is disabled. Dependent on the short circuit occurence the delay time may range from 2 to 3 clock cycles. The timing can be adjusted by variation of the external frequency-determining components ( R/C). The potentiometer at Pin 4 determines the interval pause, which can be varied by adjusting the upper charging
threshold of the oscillator. For all other time periods, an internal voltage divider determines the upper charging threshold of the oscillator (see figure 2).
Timing
Fixed: Relay activation time Dry wiping Interval pause Switch-on delay INT Variable: Debouncing time INT Debouncing time WASH 1. pre-wash delay 2. reverse debouncing Debouncing time PARK Debouncing time SC t5 t2 = = 160 1/f0 896 1/f0 or 3 cycles 872 1/f0 8 1/f0 24 to 32 1/f0 112 to 128 1/f0 16 to 32 1/f0 6 to 8 1/f0 2 to 3 1/f0
t6 = t4D = t4 =
t1 = t1.R = t8 = t7 =
TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97
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U842B
Wipe/ Wash Operation
CL 0
ON
1
2
3
OUT
OFF
SC
IC>500mA
Relay Output
The relay output is an open collector Darlington transistor with an integrated 28-V Z-diode for limitation of the inductive cut-out pulse of the relay coil. The maximum static collector current must not exceed 300 mA and the saturation voltage is typically 1.2 V for a current of 200 mA. The collector current is permanently measured by an integrated shunt, and in the case of a short circuit (IC > 500 mA) to Vbat, the relay output is stored disabled. The short circuit buffer is reset by opening the INT and WASH switches. As long as the short condition exists a further activation of these switches will disable the output stage again. Otherwise the normal wipe operation is performed. In order to avoid short-term disabling caused by current pulses of transients, a 10 ms debounce period (t7) is provided (see figure 4). During a load-dump pulse, the output transistor is switched to conductive condition to prevent destruction. The short circuit detection is suppressed during the loaddump.
Interference Voltages and Load-dump
The IC supply is protected by R1, C1 and an integrated 21-V Z-diode. The inputs are protected by a series resistor, integrated 21-V Z-diode and RF capacitor. The RC-configuration stabilizes the supply of the circuit during negative interference voltages to avoid power-on reset ( POR).
4 (12)
EEEEE EEEEE
t7
13301
Figure 4. The debouncing of the short circuit detection
The relay output is protected against short interference peaks by an integrated 28-V Z-diode. During load-dump, the relay output is switched to conductive condition if the battery voltage exceeds approximately 30 V. The output transistor is dimensioned so that it can absorb the current produced by the load-dump pulse.
Power-on Reset
When the operating voltage is switched on, an internal power-on reset pulse ( POR) is generated which sets the logic of the circuits to defined initial condition. The relay output is disabled, the short circuit buffer is reset.
Functional Description
Interval Function
The circuit is brought to its interval mode with the input switch INT operated for more than 625 ms ( t > t4 + t4D +t5 ). This time includes: - 100 ms debounce time t4 - 25 ms INT switch-on delay t4D - 500 ms relay activation time t5 If the INT input is toggled for 125 ms < t < 625 ms, the relay activation time t5 lapses anyway and the wiper performs one turn. To enable correct interval functioning, the INT input has to be activated afterwards as described. The beginning of the interval pause depends on the application with or without wiper motor park switch ( see figures 5, 6, 7 and 8 ).
TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97
U842B
Interval Function with Park-Switch Feedback
During the relay activation time the wiper motor leaves its park position and the park switch changes its potential from VBatt to GND. After the relay is switched off the wiper motor is supplied via the park switch until the park position is reached again. The park switch changes its potential from GND back to VBatt. With the park switch connected to the park input (Pin 3) the interval pause t6 starts after the 25 ms debounce time (t7) is over (see figures 5 and 6).
Wiper motor Wash pump M R2 1.5 k R3 1.5 k R4 INT 1 10 k R5 2 47 k R6 3 10 k R11 360 4 R7 1.5 k
13289
R1 180 8
Park M Run
WASH SETINT VR1 1 k
7
U842B
6
R9 220 k 5 C1 47 F C2 100 nF
Figure 5. Application circuit with park switch feedback
INT
VBatt 0V
t4
t 4D
OUT
VBatt 0V
t5
t6 t 4D
PARK
VBatt 0V t8
ON
MOTOR
OFF
13302
Figure 6. Intermittent circuit function with park position feedback
TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97
5 (12)
U842B
Interval Function without Park-Switch Feedback
If the park input of the circuit is not connected with the park switch of the wiper motor (see figure 7), the interval pause starts directly after the turn-on time of the relay is over (see figure 8).
Wiper motor Wash pump M R2 1.5 k R3 1.5 k R4 INT 1 10 k R5 2 47 k 3 R11 4 1 k 5.1 k R7 20 k Figure 7. Application circuit without park position feedback 5 C1 47 F C2 100 nF
13290
R1 180 8
Park M Run
WASH SETINT VR1
7
U842B
6
R9 220 k
V
INT
Batt 0V
t4
t 4D V Batt 0V t5
OUT
t6 t 4D
V
PARK
Batt 0V ON
MOTOR
OFF
13303
Figure 8. Intermittent circuit function without park position feedback
6 (12)
TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97
U842B
WASH
V Batt 0V V Batt
t 1R t1 t7 wipe1 wipe2 wipe3
OUT
0V
PARK
V Batt 0V ON
MOTOR
OFF
13304
Figure 9. Wash operation with park switch signal
After operating the WASH switch, the relay is activated after the debounce time, t1. As long as the switch is pushed, water is sprayed on the windscreen by the wash pump. When it is released, the dry wiping starts after 100 ms reverse debouncing (t1R). Wipe/ Wash Mode with Park Position Feedback If the park input of the circuit is connected to the park switch, the dry wiping lasts three full wipe cycles (see
V Batt
figure 9). During the third cycle, the wiper motor is supplied via the park switch because the relay driver is switched off after the second cycle. Wipe/ Wash Mode without Park Position Feedback If U842B is used without the wiper motor's park switch, Pin 3 stays at high potential via its integrated pull-up resistor. Therefore, the driver stage switches off after the fixed dry wiping time t2.
WASH
0V
OUT
V Batt t1 0V V Batt 0V ON
t 1R t2
PARK
MOTOR
OFF
13305
Figure 10. Wash operation without park signal report
TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97
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U842B
Wipe/ Wash Mode Priority
The wipe/wash mode has priority over the interval mode - therefore the interval function is interrupted as soon as the WASH switch is operated longer than the debounce time t1. With or without park switch feedback, after relay
V Batt
activation time is over (no park switch feedback), or after the third wipe (park switch feedback), the interval mode is continued with an interval pause t6 (see figures 11 and 12).
WASH
0V V Batt 0V V Batt 0V t 4D
INT
OUT
t5
t6
PARK
V Batt 0V ON OFF
13306
MOTOR
Figure 11. Wipe/ wash priority with park position feedback
V Batt
WASH
0V
INT
V Batt 0V V Batt 0V t 4D
OUT
t5
t2
t6
PARK
V Batt 0V ON
MOTOR
OFF
13307
Figure 12. Wash/ wipe priority without park position feedback
8 (12)
TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97
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VBatt = 13.5 V, Tamb = 25C, reference point ground (Pin 7), circuit with recommended external circuitry (see figure 2)
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Electrical Characteristics Thermal Resistance Absolute Maximum Ratings
Thermal resistance Maximum junction temperature Storage temperature range Supply voltage Parameters t = 60 s t = 600 s Ambient temperature range Parameters DIP8 SO8 Symbol Rthja Rthja Symbol VBatt VBatt Tamb Tstg Tj -40 to +100 Value 24 18 -30 to +100 Maximum 110 160 150
TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97 Parameters Supply Supply-voltage range Supply currrent Undervoltage threshold POR Series resistance Filter capacitance Internal Z-diode INT input Protective diode Internal capacitance Threshold Pull-up resistance External series resistance PARK input Protective diode Internal capacitance Threshold Pull-up resistance External series resistance WASH input Protective diode Internal capacitance Threshold Pull-up resistance External series resistance
Test Conditions / Pin
Pin 1
Pin 2
Pin 3
Symbol
VS I6 V6 R1 C1 V6
V2 C2 V2 R2 RS
V3 C3 V3 R3 RS
V1 C1 V1 R1 RS
Min
9
21 25 0.5 V6 100 47
21 25 0.5 V6 20 10
21 25 0.5 V6 20 10
Typ
3.5 180 47 21
U842B
Max
16 3
Unit K/W K/W
Unit V V
C C C
9 (12) V mA V kW kW kW kW kW kW
Unit
W mF
V pF V pF V pF
W W W
V
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U842B
Parameters Test Conditions / Pin PAUS input Pin 4 Protective diode Internal capacitance Relay output Pin 8 Saturation voltage 100 mA Saturation voltage 200 mA Relay coil resistance Output current Normal operation Output pulse current Load-dump Internal Z-diode Short circuit threshold Oscillator input Pin 5 Oscillator capacitor Pin 5 Oscillator resistor Pins 5 and 6 Basic frequency Lower switching point Upper switching point External 1 kW pot. Internal discharge resistance Protective diode VF = forward voltage Times External circuitry - see oscillator input (figure 3) Debouncing times: INT input WASH input Pre-wash delay Reverse delay Park Short circuit Switch-on delay (interval mode) Relay activation time Interval pause Dry wiping Without park switch feedback With park switch feedback Symbol V8 V8 RRel I8 t1 t1,R t8 t7 t4D t5 t6 C2 R8 f0 V5 V5 R5 V5 V8 I8 V4 C4 I8 t2 t4 0.2 V6 260 50 14 5 18 400 2.25 Min 500 2.1 50 60 2 VS + VF 100 220 320 0.07 V6 Typ 1.0 1.2 28 21 25 3 0.5 V6 540 125 37 12 31 625 13.75 Max 125 300 3.5 1.5 s wipes Unit V mA mA kW V nF kW Hz ms ms ms ms ms ms s ms V pF
10 (12)
TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97
W
V V
A
U842B
Package Information
Package DIP8
Dimensions in mm
9.8 9.5 1.64 1.44 7.77 7.47
4.8 max 6.4 max 0.5 min 0.58 0.48 7.62 8 5 2.54 3.3 0.36 max 9.8 8.2
technical drawings according to DIN specifications 13021
1
4
Package SO8
Dimensions in mm
5.00 4.85 1.4 0.4 1.27 3.81 8 5 0.25 0.10 0.2 3.8 6.15 5.85 5.2 4.8 3.7
technical drawings according to DIN specifications 13034
8
5
TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97
11 (12)
U842B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423
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TELEFUNKEN Semiconductors Rev. A2, 03-Feb-97


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